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[VHDL-FPGA-Verilog] test11

Description: 在altera de1的板子上安装fat12fat16fat32文件系统，已经测试成功，直接能用-In altera de1 installed on the board fat12fat16fat32 file system has been tested successfully, the direct use
Platform: | Size: 8378368 | Author: 245680 | Hits:

[VHDL-FPGA-Verilog] oc_i2c_masterI2CIP

Description: *** ***OC_I2C_Master使用说明*** ***** 使用步骤：1.将OC_I2C_Master文件夹拷贝到安装盘\altera\kits\nios2\components目录下。 之后重新打开SOPC Builder，在可用元件列表的DeviceSOPC组中将出现OC_I2C_Master 元件，即可像其它Altera外设元件一样添加和使用。 2.hdl文件夹中包含有描述i2c逻辑的硬件描述文件，不能删除。 3.HAL文件夹包含硬件抽象层所需的文件（即驱动），不能删除。 4.inc文件夹包含有定义底层硬件的C语言头文件，不能删除. 5.I2C_doc文件夹下有关于该元件的开发文档。-********* OC_I2C_Master use*********** use these steps: 1. OC_I2C_Master folder will be copied to the installation disk alterakits ios2components directory. Re-open after the SOPC Builder, a list of available devices will appear DeviceSOPC Group OC_I2C_Master components, can be similar to other peripheral devices like Altera add and use. 2.hdl folder contains logical description i2c hardware description files, can not be deleted. 3.HAL folder contains the necessary hardware abstraction layer file (ie drivers), can not be deleted. 4.inc folder contains the definition of the underlying hardware C language header files, should not delete. 5.I2C_doc folder on the development of document components.
Platform: | Size: 192512 | Author: 姓名 | Hits:

[VHDL-FPGA-Verilog] xd_lcd_comp

Description: 一款240＊128的LCD模块在ALTERA　FPGA　NIOS中的应用，自己写的AVALON总线IP，包括所有源码，可轻松用于NIOS中，供大家参考-A 240* 128 LCD module in the ALTERA FPGA NIOS application, write your own AVALON Bus IP, including all source code can be easily used in NIOS for reference
Platform: | Size: 13312 | Author: 张敏 | Hits:

[Embeded-SCM Develop] watchdog

Description: 在ALTERA的软核NIOS下watchdog组件的控制函数，分别是启动，喂狗，改监控时间，停止。小并不代表没用，逼我在压缩文件中加，两个重复文件嘛-In ALTERA
Platform: | Size: 1024 | Author: luoxi | Hits:

[Software Engineering] dma

Description: DMA调试经验，NIOS II环境下，适用altera公司芯片-DMA debugging experience, NIOS II environment, the application of altera-chip companies
Platform: | Size: 1024 | Author: yeyoushi | Hits:

[Other] Altera_Nios_II_Soft_Processor

Description: Introduction to the Altera Nios II Soft Processor
Platform: | Size: 114688 | Author: yingjiang | Hits:

[VHDL-FPGA-Verilog] c2h_fft_cyclone_ii

Description: 关于用c2h实现fft算法的源代码和说明书 altera-On C2H achieve fft algorithm using the source code and a detailed description of altera
Platform: | Size: 723968 | Author: 梁山皮 | Hits:

[Embeded-SCM Develop] uart_rxd

Description: altera 中基于NIOS软核系统的串口接收通信程序-altera-based NIOS soft-core system to receive serial communication program
Platform: | Size: 391168 | Author: 黄杰 | Hits:

[Embeded-SCM Develop] uart_txd

Description: altera 中基于NIOS软核系统的串口发送通信程序-altera-based NIOS soft-core system to send the serial communication program
Platform: | Size: 397312 | Author: 黄杰 | Hits:

[Other] CLOCK

Description: 文通过ALTERA公司的quartus II软件，用Verilog HDL语言完成多功能数字钟的设计。主要完成的功能为：计时功能，24小时制计时显示；通过七段数码管动态显示时间；校时设置功能，可分别设置时、分、秒；跑表的启动、停止 、保持显示和清除。-Through the ALTERA company quartus II software, using Verilog HDL language to complete the design of multi-function digital clock. The main function of the completion are: time function, 24-hour time display through the Seven-Segment LED dynamic display time school settings function, can be set hours, minutes, seconds the stopwatch to start, stop, and maintain display and removal.
Platform: | Size: 182272 | Author: 张保平 | Hits:

[VHDL-FPGA-Verilog] AN532_PCIe_sopc_s2gx_x4

Description: 基于S2gx芯片的NIOS下的x4模式PCI-Express模块-NIOS based S2gx chips x4 mode under the PCI-Express Module
Platform: | Size: 4856832 | Author: lzm | Hits:

[VHDL-FPGA-Verilog] flash_controller

Description: Altera下的FPGA运行Nios处理器的flash控制器-Altera
Platform: | Size: 398336 | Author: lzm | Hits:

[Software Engineering] my_first_nios2_software_tutorial

Description: quick start altera NIOS2 programming
Platform: | Size: 702464 | Author: nan | Hits:

[VHDL-FPGA-Verilog] Cyclone1C20Nios

Description: ALTERA Cyclone1C20 Nios开发板，protel99格式-ALTERA Cyclone1C20 Nios，protel99
Platform: | Size: 76800 | Author: sct_sct | Hits:

[VHDL-FPGA-Verilog] altera

Description: 在调试nios ii时，由于软件或者是环境的改变造成原先建好的工程不能正常使用，提供一点解释希望能有所帮助-when debugging Nios ii, or because of software changes in the environment are caused by the original construction of the project should not normally use, to provide a little hope to be helpful to explain
Platform: | Size: 2048 | Author: yushenghui | Hits:

[VHDL-FPGA-Verilog] tut_DE2_sdram_vhdl

Description: This tutorial explains how the SDRAM chip on ltera’s DE2 Development and Education board can be used with a Nios II system implemented by using the Altera SOPC Builder.
Platform: | Size: 546816 | Author: *Roma* | Hits:

[VHDL-FPGA-Verilog] DE2_NIOS_DEVICE_LED

Description: Altera FPGA 上利用nios嵌入式处理器实现USB的通信控制-Altera FPGA embedded processor nios use USB communication to achieve control
Platform: | Size: 4050944 | Author: 秦宜 | Hits:

[VHDL-FPGA-Verilog] UART_DMA

Description: 基于ALTERA公司的NIOSII的串口通信DMA传输设计-NIOSII based on ALTERA s DMA transfer of the serial communication design
Platform: | Size: 11346944 | Author: 王超 | Hits:

[VHDL-FPGA-Verilog] Altera_DE1_Training_Courses_Multimedia_Platform.zi

Description: Altera DE1 多媒体平台训练课程 视频教程-Altera DE1 training courses multimedia platform Video tutorial
Platform: | Size: 7545856 | Author: xiaoxu | Hits:

[VHDL-FPGA-Verilog] Lab2a

Description: C Code for a Nios II to switch led on a board with an FPGA ALTERA
Platform: | Size: 1024 | Author: gios78 | Hits:
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